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NOCS
2010
IEEE
14 years 9 months ago
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Me...
HPCA
2007
IEEE
16 years 4 days ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
EDOC
2008
IEEE
15 years 6 months ago
Facebook Meets the Virtualized Enterprise
: “Web 2.0” and “cloud computing” are revolutionizing the way IT infrastructure is accessed and managed. Web 2.0 technologies such as blogs, wikis and social networking pla...
Roger Curry, Cameron Kiddle, Nayden Markatchev, Ro...
HPCA
2007
IEEE
15 years 6 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
MIDDLEWARE
2007
Springer
15 years 5 months ago
Dynamic multi-process information flow tracking for web application security
Although there is a large body of research on detection and prevention of such memory corruption attacks as buffer overflow, integer overflow, and format string attacks, the web...
Susanta Nanda, Lap-Chung Lam, Tzi-cker Chiueh