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102
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CODES
2003
IEEE
15 years 2 months ago
A fast parallel reed-solomon decoder on a reconfigurable architecture
This paper presents a software implementation of a very fast parallel Reed-Solomon decoder on the second generation of MorphoSys reconfigurable computation platform, which is targ...
Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
87
Voted
BIRTHDAY
2006
Springer
15 years 1 months ago
Verification by Parallelization of Parametric Code
Abstract. Loops and other unbound control structures constitute a major bottleneck in formal software verification, because correctness proofs over such control structures generall...
Tobias Gedell, Reiner Hähnle
CODES
2006
IEEE
15 years 3 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
MDM
2007
Springer
209views Communications» more  MDM 2007»
15 years 3 months ago
Parallelized Simulated Annealing for Model Updating in Ad-Hoc Wireless Sensing Networks
The engineering community has recently begun to adopt wireless sensing technologies for use in many sensing applications. These low-cost sensors provide an optimal setting for den...
Andrew T. Zimmerman, Jerome P. Lynch
93
Voted
ISORC
2007
IEEE
15 years 3 months ago
A Comparative Evaluation of EJB Implementation Methods
As E-businesses are becoming ubiquitous, enhancing the performance and scalability of ebusiness systems has become an increasingly important topic of investigation. As Vitruvius (...
Andreas Stylianou, Giovanna Ferrari, Paul D. Ezhil...