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TVLSI
2002
130views more  TVLSI 2002»
14 years 9 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
GLOBECOM
2007
IEEE
15 years 4 months ago
Performance Analysis of the Parallel Optical All-Pass Filter Equalizer for Chromatic Dispersion Compensation at 10 Gb/s
— Optical fiber is capable of providing the solution to the need of high bandwidth communication. The main degradation to the optical signal integrity in single mode fibers (SMFs...
Wai Pang Ng, Wisit Loedhammacakra, Robert A. Cryan...
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
15 years 3 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
ICECCS
2007
IEEE
118views Hardware» more  ICECCS 2007»
15 years 4 months ago
Parallel Model Checking and the FMICS-jETI Platform
In this paper we summarize parallel algorithms for enumerative model checking of properties formulated in linear time temporal logic (LTL) as well as a fragment of the µcalculus ...
Jiri Barnat, Lubos Brim, Martin Leucker
SYNASC
2005
IEEE
77views Algorithms» more  SYNASC 2005»
15 years 3 months ago
On P Systems with Bounded Parallelism
— A framework that describes the evolution of P systems with bounded parallelism is defined by introducing basic formal features that can be then integrated into a structural op...
Francesco Bernardini, Francisco José Romero...