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» Parallel I O in Bulk-Synchronous Parallel ML
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HPDC
1999
IEEE
13 years 10 months ago
Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
Samir Koussih, Anurag Acharya, Sanjeev Setia
IPPS
1999
IEEE
13 years 10 months ago
Non-Preemptive Scheduling of Real-Time Threads on Multi-Level-Context Architectures
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
Jan Jonsson, Henrik Lönn, Kang G. Shin
HPCA
2001
IEEE
14 years 6 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
ESCIENCE
2005
IEEE
13 years 12 months ago
The SegHidro Experience: Using the Grid to Empower a Hydro-Meteorological Scientific Network
This paper describes our experience with SegHidro, a project that empowers hydro-meteorological researchers by (i) enabling collaborative work via the coupling of computer models,...
Eliane Araújo, Walfredo Cirne, Gustavo Wagn...
VISSYM
2003
13 years 7 months ago
Visual Hierarchical Dimension Reduction for Exploration of High Dimensional Datasets
Traditional visualization techniques for multidimensional data sets, such as parallel coordinates, glyphs, and scatterplot matrices, do not scale well to high numbers of dimension...
Jing Yang, Matthew O. Ward, Elke A. Rundensteiner,...