5588 search results - page 1064 / 1118 » Parallel Implementation of Bags |
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
Long-latency loads are critical in today's processors due to the ever-increasing speed gap with memory. Not only do these loads block the execution of dependent instructions,...
HPCA
2001
IEEE
15 years 10 months ago
2001
IEEE
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
HPCA
2001
IEEE
15 years 10 months ago
2001
IEEE
Network performance in tightly-coupled multiprocessors typically degrades rapidly beyond network saturation. Consequently, designers must keep a network below its saturation point...
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POPL
2007
ACM
15 years 10 months ago
2007
ACM
Path profiles provide a more accurate characterization of a program's dynamic behavior than basic block or edge profiles, but are relatively more expensive to collect. This h...