Sciweavers

5588 search results - page 176 / 1118
» Parallel Implementation of Bags
Sort
View
DSD
2009
IEEE
145views Hardware» more  DSD 2009»
15 years 10 months ago
High Performance Image Processing on a Massively Parallel Processor Array
Multicore and manycore processors are the new wave of computing, offering high performance by using large numbers of simple processors. In this paper, we describe the implementati...
Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bru...
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
15 years 8 months ago
High-speed VLSI architecture for parallel Reed-Solomon decoder
—This paper presents high-speed parallel Reed–Solomon (RS) (255,239) decoder architecture using modified Euclidean algorithm for the high-speed multigigabit-per-second fiber op...
Hanho Lee
ISHPC
2003
Springer
15 years 8 months ago
Online Remote Trace Analysis of Parallel Applications on High-Performance Clusters
The paper presents the design and development of an online remote trace measurement and analysis system. The work combines the strengths of the TAU performance system with that of ...
Holger Brunst, Allen D. Malony, Sameer Shende, Rob...
ACPC
1999
Springer
15 years 7 months ago
Parallel MPEG-2 Encoder on ATM and Ethernet-Connected Workstations
We present a software-based parallel MPEG-2 video encoder implemented on a cluster of workstations connected via an ATM switch and also via Ethernet. We exploit parallelism on a Gr...
Shahriar M. Akramullah, Ishfaq Ahmad, Ming L. Liou
ICEC
1994
147views more  ICEC 1994»
15 years 4 months ago
VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
A parallel implementation of a genetic algorithm used to evolve simple analog VLSI circuits is described. The parallel computer system consisted of twenty distributed SPARC workst...
Mike Davis, Luoping Liu, John G. Elias