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ASPDAC
2010
ACM
183views Hardware» more  ASPDAC 2010»
15 years 1 months ago
Multi-operand adder synthesis on FPGAs using generalized parallel counters
Multi-operand adders, which are also found in parallel multipliers, usually consist of the compression trees which reduce the number of operands per a bit to two, and the carrypro...
Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga
FPL
2010
Springer
170views Hardware» more  FPL 2010»
15 years 1 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
EGC
2005
Springer
15 years 8 months ago
Optimising Parallel Applications on the Grid Using Irregular Array Distributions
In this paper we propose a new approach for scheduling data parallel applications on the Grid using irregular array distributions. We implement the scheduler as a new case study fo...
Radu Prodan, Thomas Fahringer
ICPP
1993
IEEE
15 years 7 months ago
Data-Parallel R-Tree Algorithms
Abstract Data-parallel algorithms for R-trees, a common spatial data structure are presented, in the domain of planar line segment data e.g., Bureau of the Census TIGER Line les....
Erik G. Hoel, Hanan Samet
ICPP
1994
IEEE
15 years 7 months ago
Data-Parallel Spatial Join Algorithms
E cient data-parallel spatial join algorithms for pmr quadtrees and R-trees, common spatial data structures, are presented. The domain consists of planar line segment data i.e., Bu...
Erik G. Hoel, Hanan Samet