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FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
15 years 10 months ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
EUROPAR
2007
Springer
15 years 10 months ago
Parallelization of Bulk Operations for STL Dictionaries
STL dictionaries like map and set are commonly used in C++ programs. We consider parallelizing two of their bulk operations, namely the construction from many elements, and the ins...
Leonor Frias, Johannes Singler
ROBIO
2006
IEEE
130views Robotics» more  ROBIO 2006»
15 years 9 months ago
GA-Based Multi-Objective Optimal Design of a Planar 3-DOF Cable-Driven Parallel Manipulator
— The architecture optimization of a three degrees of freedom (3-DOF) planar cable-driven parallel manipulator (CDPM) with multiple objectives has been implemented by means of GA...
Yangmin Li, Qingsong Xu
132
Voted
SIPS
2006
IEEE
15 years 9 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan
111
Voted
CAMP
2005
IEEE
15 years 9 months ago
Parallel Extraction Architecture for Image Moments of Numerous Objects
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
Yoshihiro Watanabe, Takashi Komuro, Shingo Kagami,...