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146
Voted
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
15 years 10 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...
135
Voted
IPPS
2003
IEEE
15 years 9 months ago
Performing DNA Comparison on a Bio-Inspired Tissue of FPGAs
String comparison is a critical issue in many application domains, including speech recognition, contents search, and bioinformatics. The similarity between two strings of lengths...
Matteo Canella, Filippo Miglioli, Alessandro Bogli...
OOPSLA
2009
Springer
15 years 10 months ago
Parallel programming with object assemblies
We present Chorus, a high-level parallel programming model suitable for irregular, heap-manipulating applications like mesh refinement and epidemic simulations, and JChorus, an i...
Roberto Lublinerman, Swarat Chaudhuri, Pavol Cern&...
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
15 years 10 months ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
CGO
2004
IEEE
15 years 7 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler