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HIPEAC
2009
Springer
15 years 10 months ago
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
Michael B. Henry, Leyla Nazhandali
IPPS
2009
IEEE
15 years 10 months ago
Performance prediction for running workflows under role-based authorization mechanisms
When investigating the performance of running scientific/ commercial workflows in parallel and distributed systems, we often take into account only the resources allocated to the ...
Ligang He, Mark Calleja, Mark Hayes, Stephen A. Ja...
109
Voted
ASPLOS
2010
ACM
15 years 10 months ago
Cortical architectures on a GPGPU
As the number of devices available per chip continues to increase, the computational potential of future computer architectures grows likewise. While this is a clear benefit for f...
Andrew Nere, Mikko Lipasti
HPDC
2008
IEEE
15 years 10 months ago
StoreGPU: exploiting graphics processing units to accelerate distributed storage systems
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
Samer Al-Kiswany, Abdullah Gharaibeh, Elizeu Santo...
109
Voted
IEEEPACT
2008
IEEE
15 years 10 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...