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128
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IPPS
2010
IEEE
15 years 1 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell
CGO
2007
IEEE
15 years 9 months ago
SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance
Dynamic instrumentation systems have proven to be extremely valuable for program introspection, architectural simulation, and bug detection. Yet a major drawback of modern instrum...
Steven Wallace, Kim M. Hazelwood
100
Voted
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
15 years 8 months ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman
IEEECIT
2010
IEEE
15 years 1 months ago
Scaling the iHMM: Parallelization versus Hadoop
—This paper compares parallel and distributed implementations of an iterative, Gibbs sampling, machine learning algorithm. Distributed implementations run under Hadoop on facilit...
Sebastien Bratieres, Jurgen Van Gael, Andreas Vlac...
IPPS
1999
IEEE
15 years 7 months ago
The Characterization of Data-Accumulating Algorithms
A data-accumulating algorithm (d-algorithm for short) works on an input considered as a virtually endless stream. The computation terminates when all the currently arrived data ha...
Stefan D. Bruda, Selim G. Akl