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IPPS
2005
IEEE
15 years 10 months ago
Stream PRAM
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
Darrell R. Ulm, Michael Scherger
ARC
2007
Springer
150views Hardware» more  ARC 2007»
15 years 8 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
TACAS
2010
Springer
342views Algorithms» more  TACAS 2010»
15 years 11 months ago
SAT Based Bounded Model Checking with Partial Order Semantics for Timed Automata
We study the model checking problem of timed automata based on SAT solving. Our work investigates alternative possibilities for coding the SAT reductions that are based on parallel...
Janusz Malinowski, Peter Niebert
132
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HPCS
2005
IEEE
15 years 10 months ago
High Performance Derivative-Free Optimization Applied to Biomedical Image Registration
Abstract— Optimization of a similarity metric is an essential component in most medical image registration approaches based on image intensities. In this paper, two new, determin...
Mark P. Wachowiak, Terry M. Peters
PVM
2004
Springer
15 years 10 months ago
Numerical Simulations on PC Graphics Hardware
On recent PC graphics cards, fully programmable parallel geometry and pixel units are available providing powerful instruction sets to perform arithmetic and logical operations. In...
Jens Krüger, Thomas Schiwietz, Peter Kipfer, ...