Sciweavers

5553 search results - page 375 / 1111
» Parallel Implementation of Sch
Sort
View
HPDC
2010
IEEE
15 years 6 months ago
Twister: a runtime for iterative MapReduce
MapReduce programming model has simplified the implementation of many data parallel applications. The simplicity of the programming model and the quality of services provided by m...
Jaliya Ekanayake, Hui Li, Bingjing Zhang, Thilina ...
ICLP
2011
Springer
14 years 8 months ago
Minimizing the overheads of dependent {AND}-parallelism
Parallel implementations of programming languages need to control synchronization overheads. Synchronization is essential for ensuring the correctness of parallel code, yet it add...
Peter Wang, Zoltan Somogyi
ASAP
2011
IEEE
247views Hardware» more  ASAP 2011»
14 years 4 months ago
High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder
—To meet the higher data rate requirement of emerging wireless communication technology, numerous parallel turbo decoder architectures have been developed. However, the interleav...
Guohui Wang, Yang Sun, Joseph R. Cavallaro, Yuanbi...
CGO
2008
IEEE
15 years 11 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
159
Voted
PDP
2009
IEEE
15 years 11 months ago
Phoenix: A Runtime Environment for High Performance Computing on Chip Multiprocessors
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
Avneesh Pant, Hassan Jafri, Volodymyr V. Kindraten...