5553 search results - page 890 / 1111 » Parallel Implementation of Sch |
135
click to vote
CDES
2006
15 years 5 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
135
click to vote
WSC
1997
15 years 5 months ago
1997
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...
138
click to vote
HPDC
2010
IEEE
15 years 5 months ago
2010
IEEE
MapReduce offers a flexible programming model for processing and generating large data sets on dedicated resources, where only a small fraction of such resources are every unavaila...
139
click to vote
CLUSTER
1999
IEEE
15 years 4 months ago
1999
IEEE
Efficient data storage, a major concern in the modern computer industry, is mostly provided today by the the traditional magnetic disk. Unfortunately the cost of a disk transfer m...
149
click to vote
TCSV
2002
15 years 4 months ago
2002
Compressed video bitstreams require protection from channel errors in a wireless channel. The threedimensional (3-D) SPIHT coder has proved its efficiency and its real-time capabi...