5553 search results - page 893 / 1111 » Parallel Implementation of Sch |
139
click to vote
ISCA
2006
IEEE
15 years 10 months ago
2006
IEEE
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
162
click to vote
CODES
2005
IEEE
15 years 10 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
138
click to vote
MICRO
2005
IEEE
15 years 10 months ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
161
click to vote
OOPSLA
2005
Springer
15 years 10 months ago
2005
Springer
is a simple and elegant abstraction that allows concurrency to be expressed often through a relatively small rewrite of a sequential program. In the absence of side-effects, futur...
149
click to vote
ICPP
2002
IEEE
15 years 9 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...