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ISCAS
2005
IEEE
136views Hardware» more  ISCAS 2005»
15 years 3 months ago
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon
GRID
2004
Springer
15 years 3 months ago
Implementation and Evaluation of a ReplicaSet Grid Service
We present the implementation and performance of a ReplicaSet service based on the specification developed in the OGSA Data Replication Services (OREP) Working Group of the Global...
Mary Manohar, Ann L. Chervenak, Ben Clifford, Carl...
IWANN
1993
Springer
15 years 2 months ago
Hardware Implementations of Artificial Neural Networks
Over the past decade a large variety of hardware has been designed to exploit the inherent parallelism of the artificial neural network models. This paper presents an overview of ...
Dante Del Corso
DSD
2004
IEEE
122views Hardware» more  DSD 2004»
15 years 1 months ago
On the Packet-Switched Implementation of a Discrete-Time CNN
Cellular Neural Networks are widely used with real-time image processing's applications. Such systems can be efficiently realized using macro enriched fieldprogrammable gate-...
Suleyman Malki, Lambert Spaanenburg
FMOODS
2007
14 years 11 months ago
Distributed Applications Implemented in Maude with Parameterized Skeletons
Abstract. Algorithmic skeletons are a well-known approach for implementing parallel and distributed applications. Declarative versions typically use higher-order functions in funct...
Adrián Riesco, Alberto Verdejo