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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 9 months ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...
IISWC
2008
IEEE
15 years 11 months ago
Characterizing and improving the performance of Intel Threading Building Blocks
Abstract— The Intel Threading Building Blocks (TBB) runtime library [1] is a popular C++ parallelization environment [2][3] that offers a set of methods and templates for creatin...
Gilberto Contreras, Margaret Martonosi
CSFW
2004
IEEE
15 years 8 months ago
Secure Information Flow by Self-Composition
Non-interference is a high-level security property that guarantees the absence of illicit information leakages through executing programs. More precisely, non-interference for a p...
Gilles Barthe, Pedro R. D'Argenio, Tamara Rezk
JTRES
2010
ACM
15 years 4 months ago
The embedded Java benchmark suite JemBench
Requirements to embedded systems increase steadily. In parallel, also the performance of the processors used in these systems is improved leading to multithreaded and/or multicore...
Martin Schoeberl, Thomas B. Preußer, Sascha ...
ICPP
2007
IEEE
15 years 10 months ago
COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications
This paper presents COBRA (Continuous Binary ReAdaptation), a runtime binary optimization framework, for multithreaded applications. It is currently implemented on Itanium 2 based...
Jinpyo Kim, Wei-Chung Hsu, Pen-Chung Yew