88 search results - page 4 / 18 » Parallel Logic Simulation of VLSI Systems |
122
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WSC
1998
15 years 6 months ago
1998
Parallel discrete event simulation (PDES) decreases a simulation's runtime by splitting the simulation's work between multiple processors. Many users avoid PDES because ...
163
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IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communitie...
152
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GLVLSI
2003
IEEE
15 years 10 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
172
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PADS
2006
ACM
15 years 11 months ago
2006
ACM
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
177
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DSRT
2008
IEEE
15 years 7 months ago
2008
IEEE
This paper proposes a novel Lightweight Time Warp (LTW) protocol for high-performance parallel optimistic simulation of large-scale DEVS and CellDEVS models. By exploiting the cha...