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IPPS
2010
IEEE
14 years 7 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell
AHS
2006
IEEE
145views Hardware» more  AHS 2006»
15 years 1 months ago
The Gannet Service-Based SoC: A Service-level Reconfigurable Architecture
We propose a novel type of dynamically reconfigurable System-on-Chip architecture, the Gannet service-based architecture. This novel concept addresses the issue of systemlevel rec...
Wim Vanderbauwhede
BIBM
2009
IEEE
218views Bioinformatics» more  BIBM 2009»
15 years 4 months ago
Real-Time Non-rigid Registration of Medical Images on a Cooperative Parallel Architecture
Abstract—Unacceptable execution time of Non-rigid registration (NRR) often presents a major obstacle to its routine clinical use. Parallel computing is an effective way to accele...
Yixun Liu, Andriy Fedorov, Ron Kikinis, Nikos Chri...
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EUROPAR
2009
Springer
15 years 4 months ago
A Multilevel Parallelization Framework for High-Order Stencil Computations
Stencil based computation on structured grids is a common kernel to broad scientific applications. The order of stencils increases with the required precision, and it is a challeng...
Hikmet Dursun, Ken-ichi Nomura, Liu Peng, Richard ...
GRID
2006
Springer
14 years 9 months ago
A Parallel Approach to XML Parsing
A language for semi-structured documents, XML has emerged as the core of the web services architecture, and is playing crucial roles in messaging systems, databases, and document p...
Wei Lu, Kenneth Chiu, Yinfei Pan