309 search results - page 13 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
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DEBS
2010
ACM
15 years 1 months ago
2010
ACM
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
CGO
2004
IEEE
15 years 1 months ago
2004
IEEE
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
EUROPAR
2005
Springer
15 years 3 months ago
2005
Springer
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
HPCA
2007
IEEE
15 years 10 months ago
2007
IEEE
Utilizing the nonuniform latencies of SDRAM devices, access reordering mechanisms alter the sequence of main memory access streams to reduce the observed access latency. Using a r...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...