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SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
15 years 9 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
FOCS
1992
IEEE
15 years 7 months ago
On the Fault Tolerance of Some Popular Bounded-Degree Networks
In this paper, we analyze the fault tolerance of several bounded-degree networks that are commonly used for parallel computation. Among other things, we show that an N-node butterf...
Frank Thomson Leighton, Bruce M. Maggs, Ramesh K. ...
142
Voted
MVA
1992
188views Computer Vision» more  MVA 1992»
15 years 4 months ago
The Programmable and Configurable Low Level Vision Unit of the HERMIA Machine
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
Gaetano Gerardi, Giancarlo Parodi
146
Voted
JC
2007
160views more  JC 2007»
15 years 3 months ago
BDDC methods for discontinuous Galerkin discretization of elliptic problems
A discontinuous Galerkin (DG) discretization of Dirichlet problem for second-order elliptic equations with discontinuous coefficients in 2-D is considered. For this discretization...
Maksymilian Dryja, Juan Galvis, Marcus Sarkis
TOMACS
1998
140views more  TOMACS 1998»
15 years 3 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...