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IPPS
2010
IEEE
14 years 7 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
14 years 8 months ago
Evolution of thread-level parallelism in desktop applications
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
IPPS
2010
IEEE
14 years 7 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
SOSP
2001
ACM
15 years 6 months ago
Building Efficient Wireless Sensor Networks with Low-Level Naming
In most distributed systems, naming of nodes for low-level communication leveragestopologicallocation(such as node addresses) and is independentof any application. In this paper, ...
John S. Heidemann, Fabio Silva, Chalermek Intanago...
CCGRID
2006
IEEE
15 years 3 months ago
ReCon: A Fast and Reliable Replica Retrieval Service for the Data Grid
The Data Grid provides a scalable infrastructure for storage resources and data distribution management. It also supports a variety of scientific applications that require access...
XiaoLi Zhou, Eunsung Kim, Jai Wug Kim, Heon Young ...