298 search results - page 54 / 60 » Parallel Program Performance Metrics: A Comparison and Valid... |
86
Voted
ISPASS
2010
IEEE
15 years 4 months ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
63
Voted
ISCA
2005
IEEE
15 years 3 months ago
2005
IEEE
As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Up to now, system designers have prim...
EMSOFT
2007
Springer
15 years 1 months ago
2007
Springer
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
TECS
2008
14 years 9 months ago
2008
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
SC
2003
ACM
15 years 2 months ago
2003
ACM
The growing processor/memory performance gap causes the performance of many codes to be limited by memory accesses. If known to exist in an application, strided memory accesses fo...