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» Parallel Programmability and the Chapel Language
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PPOPP
2009
ACM
16 years 2 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann
IEEEPACT
2007
IEEE
15 years 8 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 8 months ago
ECMon: exposing cache events for monitoring
The advent of multicores has introduced new challenges for programmers to provide increased performance and software reliability. There has been significant interest in technique...
Vijay Nagarajan, Rajiv Gupta
129
Voted
ANCS
2007
ACM
15 years 5 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
125
Voted
MIDDLEWARE
2009
Springer
15 years 8 months ago
Automatic Generation of Network Protocol Gateways
The emergence of networked devices in the home has made it possible to develop applications that control a variety of household functions. However, current devices communicate via ...
Yérom-David Bromberg, Laurent Réveil...