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» Parallel Programming and Parallel Abstractions in Fortress
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HPCC
2009
Springer
15 years 3 months ago
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
Sutirtha Sanyal, Sourav Roy, Adrián Cristal...
EUROPAR
2010
Springer
15 years 10 days ago
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures
Abstract. This paper is motivated by the desire to provide an efficient and scalable software cache implementation of OpenMP on multicore and manycore architectures in general, and...
Chen Chen, Joseph B. Manzano, Ge Gan, Guang R. Gao...
ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
14 years 11 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
HPCA
2008
IEEE
15 years 11 months ago
Automated microprocessor stressmark generation
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, ...
EDOC
2009
IEEE
15 years 6 months ago
An End-to-End Approach for QoS-Aware Service Composition
Abstract—A simple and effective composition of software services into higher-level composite services is still a very challenging task. Especially in enterprise environments, Qua...
Florian Rosenberg, Predrag Celikovic, Anton Michlm...