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» Parallel Programming with Transactional Memory
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PDCN
2004
15 years 29 days ago
Improving http-server performance by adapted multithreading
It is wellknown that http servers can be programmed easier by using multithreading, i.e. each connection is dealt with by a separate thread. It is also known, e.g. from massively ...
Jörg Keller, Olaf Monien
IEEEPACT
2005
IEEE
15 years 5 months ago
HUNTing the Overlap
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
Costin Iancu, Parry Husbands, Paul Hargrove
PPOPP
2009
ACM
16 years 4 days ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...
VLDB
2007
ACM
145views Database» more  VLDB 2007»
15 years 11 months ago
Executing Stream Joins on the Cell Processor
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
Bugra Gedik, Philip S. Yu, Rajesh Bordawekar
GISCIENCE
2004
Springer
130views GIS» more  GISCIENCE 2004»
15 years 5 months ago
Comparing Exact and Approximate Spatial Auto-regression Model Solutions for Spatial Data Analysis
The spatial auto-regression (SAR) model is a popular spatial data analysis technique, which has been used in many applications with geo-spatial datasets. However, exact solutions f...
Baris M. Kazar, Shashi Shekhar, David J. Lilja, Ra...