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DATE
2008
IEEE
153views Hardware» more  DATE 2008»
15 years 4 months ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
MICRO
1998
IEEE
108views Hardware» more  MICRO 1998»
15 years 2 months ago
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
Chia-Lin Yang, Barton Sano, Alvin R. Lebeck
ASPLOS
2009
ACM
15 years 10 months ago
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
Robert D. Cameron, Dan Lin
BMCBI
2011
14 years 5 months ago
DecGPU: distributed error correction on massively parallel graphics processing units using CUDA and MPI
Background: Next-generation sequencing technologies have led to the high-throughput production of sequence data (reads) at low cost. However, these reads are significantly shorter...
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
PPPJ
2009
ACM
15 years 4 months ago
Automatic parallelization for graphics processing units
Accelerated graphics cards, or Graphics Processing Units (GPUs), have become ubiquitous in recent years. On the right kinds of problems, GPUs greatly surpass CPUs in terms of raw ...
Alan Leung, Ondrej Lhoták, Ghulam Lashari