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122
Voted
HPCA
2006
IEEE
16 years 2 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
129
Voted
HPCA
2004
IEEE
16 years 2 months ago
2004
IEEE
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
111
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HPCA
2003
IEEE
16 years 2 months ago
2003
IEEE
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing a new processor architecture, as well as when evaluating the ...
121
Voted
ASAP
2009
IEEE
15 years 11 months ago
2009
IEEE
—Simulating spiking neural networks is of great interest to scientists wanting to model the functioning of the brain. However, large-scale models are expensive to simulate due to...
113
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ICCAD
2008
IEEE
15 years 11 months ago
2008
IEEE
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...