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MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
15 years 8 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
ICS
1989
Tsinghua U.
15 years 8 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu
FPL
2008
Springer
163views Hardware» more  FPL 2008»
15 years 6 months ago
Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system
We have constructed a FPGA-based "early neural circuit simulator" to model the first two stages of stimulus encoding and processing in the rat whisker system. Rats use t...
Brian Leung, Yan Pan, Chris Schroeder, Seda Ogrenc...
MVA
1994
113views Computer Vision» more  MVA 1994»
15 years 5 months ago
A Modified Simulation Environment for Reconfigurable Multicomputer Systems in Digital Image Processing Applications
In our work we improve the EPPI programming environment, which was made in the University of Castilla - la Mancha one year ago. EPPI is a tool for simulating parallel algorithms t...
Francisco J. Quiles, Antonio Jose Garrido del Solo
CONCUR
2003
Springer
15 years 9 months ago
Deciding Bisimilarity between BPA and BPP Processes
We identify a necessary condition for when a given BPP process can be expressed as a BPA process. We provide an effective procedure for testing if this condition holds of a given B...
Petr Jancar, Antonín Kucera, Faron Moller