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ICS
1999
Tsinghua U.
15 years 6 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...
ICPP
1995
IEEE
15 years 5 months ago
Progress: A Toolkit for Interactive Program Steering
Interactive program steering permits researchers to monitor and guide their applications during runtime. Interactive steering can help make end users more effective in addressing ...
Jeffrey S. Vetter, Karsten Schwan
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
15 years 8 months ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
15 years 7 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
PADS
2005
ACM
15 years 7 months ago
Seven-O'Clock: A New Distributed GVT Algorithm Using Network Atomic Operations
In this paper we introduce a new concept, network atomic operations (NAOs) to create a zero-cost consistent cut. Using NAOs, we define a wall-clock-time driven GVT algorithm call...
David W. Bauer, Garrett R. Yaun, Christopher D. Ca...