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ISCA
2011
IEEE
290views Hardware» more  ISCA 2011»
14 years 5 months ago
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
Blas Cuesta, Alberto Ros, María Engracia G&...
DCOSS
2011
Springer
14 years 1 months ago
STARS: Static relays for multi-robot real-time search and monitoring
Abstract—We first present a problem called precedence constrained two traveling salesman (PC2TSP). We propose a nearoptimal heuristic to PC2TSP to generate tours by clustering p...
Yuanteng Pei, Matt W. Mutka
PPOPP
1997
ACM
15 years 5 months ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
ICS
2000
Tsinghua U.
15 years 5 months ago
A simulation-based study of scheduling mechanisms for a dynamic cluster environment
Scheduling of processes onto processors of a parallel machine has always been an important and challenging area of research. The issue becomes even more crucial and di cult as we ...
Yanyong Zhang, Anand Sivasubramaniam, José ...
ICPADS
2008
IEEE
15 years 8 months ago
A Meta-scheduler with Auction Based Resource Allocation for Global Grids
As users increasingly require better quality of service from Grids, resource management and scheduling mechanisms have to evolve in order to satisfy competing demands on limited r...
Saurabh Kumar Garg, Srikumar Venugopal, Rajkumar B...