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IPPS
2006
IEEE
15 years 7 months ago
Exploiting processing locality through paging configurations in multitasked reconfigurable systems
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
T. Taher, Tarek A. El-Ghazawi
PPOPP
2010
ACM
15 years 11 months ago
Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
Eddy Z. Zhang, Xipeng Shen, Yunlian Jiang
DCOSS
2005
Springer
15 years 7 months ago
Design of Adaptive Overlays for Multi-scale Communication in Sensor Networks
In wireless sensor networks, energy and communication bandwidth are precious resources. Traditionally, layering has been used as a design principle for network stacks; hence routin...
Santashil PalChaudhuri, Rajnish Kumar, Richard G. ...
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 6 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
IPPS
2010
IEEE
14 years 11 months ago
On the parallelisation of MCMC by speculative chain execution
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
Jonathan M. R. Byrd, Stephen A. Jarvis, Abhir H. B...