462 search results - page 54 / 93 » Parallel algorithm for hardware implementation of inverse ha... |
IPPS
2000
IEEE
15 years 2 months ago
2000
IEEE
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
72
Voted
IPPS
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper presents a new methodology for implementing fast synchronization on scalable cache-coherent multiprocessors, through the use of hybrid primitives. Hybrid primitives lev...
92
Voted
IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
HPDC
1993
IEEE
15 years 1 months ago
1993
IEEE
Building the hardware for a high-performance distributed computer system is a lot easier than building its software. In this paper we describe a model for programtributed systems ...
HPCS
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract— In recent years our society has witnessed an unprecedented growth in computing power available to tackle important problems in science, engineering and medicine. For ex...