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115
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DATE
2010
IEEE
156views Hardware» more  DATE 2010»
15 years 5 months ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
IPPS
2005
IEEE
15 years 6 months ago
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
Michalis D. Galanis, Athanasios Milidonis, George ...
105
Voted
IFIP
2001
Springer
15 years 4 months ago
A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation
: A new efficient type I architecture for motion estimation in video sequences based on the Full-Search Block-Matching (FSBM) algorithm is proposed in this paper. This architecture...
Nuno Roma, Leonel Sousa
145
Voted
STTT
2010
115views more  STTT 2010»
14 years 11 months ago
Scalable shared memory LTL model checking
Recent development in computer hardware has brought more wide-spread emergence of shared memory, multi-core systems. These architectures offer opportunities to speed up various ta...
Jiri Barnat, Lubos Brim, Petr Rockai
124
Voted
IGARSS
2009
14 years 10 months ago
High Performance Computing for Hyperspectral Image Analysis: Perspective and State-of-the-art
The main purpose of this paper is to describe available (HPC)based implementations of remotely sensed hyperspectral image processing algorithms on multi-computer clusters, heterog...
Antonio Plaza, Qian Du, Yang-Lang Chang