462 search results - page 66 / 93 » Parallel algorithm for hardware implementation of inverse ha... |
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
Abstract— Recently, a delay-insensitive architecture for gradient descent adaptive control, based on parallel synchronous detection for model-free gradient estimation was present...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
FCCM
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
DAGSTUHL
1997
14 years 11 months ago
1997
This paper describes and demonstrates the e ectiveness of several metrics for data level comparison of direct volume rendering (DVR) algorithms. The focus is not on speed ups from...
MAM
2007
14 years 9 months ago
2007
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...