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IEEEPACT
2007
IEEE
16 years 1 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
IEEEPACT
2007
IEEE
16 years 1 months ago
Fast Track: Supporting Unsafe Optimizations with Software Speculation
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
Kirk Kelsey, Chengliang Zhang, Chen Ding
ISORC
2007
IEEE
16 years 1 months ago
Device Modeling for a Flexible Embedded Systems Development Process
Methodologies, techniques and tools that currently support the embedded systems (ESs) development process prove inadequate for today’s complex ESs. Adopted traditional architect...
Kleanthis C. Thamboulidis, George S. Doukas, Giann...
ISORC
2007
IEEE
16 years 1 months ago
LSynD: Localized Synopsis Diffusion
Wireless sensor networks represent an extremely fastgrowing emerging technology, but still suffer from several limitations. The state of the art in sensor networks focuses on opti...
Andreea Berfield, Panos K. Chrysanthis, Daniel Mos...
ISORC
2007
IEEE
16 years 1 months ago
Exploiting Tuple Spaces to Provide Fault-Tolerant Scheduling on Computational Grids
Scheduling tasks on large-scale computational grids is difficult due to the heterogeneous computational capabilities of the resources, node unavailability and unreliable network ...
Fábio Favarim, Joni da Silva Fraga, Lau Che...
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