284 search results - page 30 / 57 » Parallel buffers for chip multiprocessors |
IEEEPACT
2005
IEEE
15 years 3 months ago
2005
IEEE
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
79
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CASES
2006
ACM
15 years 3 months ago
2006
ACM
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
127
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CAL
2008
14 years 9 months ago
2008
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
97
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ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling,...