284 search results - page 34 / 57 » Parallel buffers for chip multiprocessors |
ISPASS
2003
IEEE
15 years 2 months ago
2003
IEEE
Achieving high performance in cryptographic processing is important due to the increasing connectivity among today’s computers. Despite steady improvements in microprocessor and...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
DFT
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
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PPL
2008
14 years 9 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
RTSS
2006
IEEE
15 years 3 months ago
2006
IEEE
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...