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» Parallel buffers for chip multiprocessors
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ICPP
1991
IEEE
15 years 1 months ago
Two Techniques to Enhance the Performance of Memory Consistency Models
The memory consistency model supported by a multiprocessor directly affects its performance. Thus, several attempts have been made to relax the consistency models to allow for mor...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
83
Voted
IEEEPACT
2009
IEEE
15 years 4 months ago
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading
— This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithread...
Leo Porter, Bumyong Choi, Dean M. Tullsen
CAL
2006
14 years 9 months ago
From sequential programs to concurrent threads
Chip multiprocessors are of increasing importance due to recent difficulties in achieving higher clock frequencies in uniprocessors, but their success depends on finding useful wor...
Guilherme Ottoni, Ram Rangan, Adam Stoler, Matthew...
77
Voted
EUROPAR
2006
Springer
15 years 1 months ago
PAM-SoC: A Toolchain for Predicting MPSoC Performance
In the past, research on Multiprocessor Systems-on-Chip (MPSoC) has focused mainly on increasing the available processing power on a chip, while less effort was put into specific s...
Ana Lucia Varbanescu, Henk J. Sips, Arjan J. C. va...
CGO
2009
IEEE
15 years 4 months ago
Software Pipelined Execution of Stream Programs on GPUs
—The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. This model allows programmers to sp...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...