284 search results - page 41 / 57 » Parallel buffers for chip multiprocessors |
116
Voted
IPPS
1999
IEEE
1999
IEEE
Visualization and Performance Prediction of Multithreaded Solaris Programs by Tracing Kernel Threads
15 years 1 months ago
Efficient performance tuning of parallel programs is often hard. We present a performance prediction and visualization tool called VPPB. Based on a monitored uni-processor executi...
73
Voted
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...
68
Voted
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...
86
Voted
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...