284 search results - page 48 / 57 » Parallel buffers for chip multiprocessors |
92
Voted
PPOPP
2010
ACM
15 years 7 months ago
2010
ACM
Most modern Chip Multiprocessors (CMP) feature shared cache on chip. For multithreaded applications, the sharing reduces communication latency among co-running threads, but also r...
CASES
2005
ACM
14 years 11 months ago
2005
ACM
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
ISPASS
2009
IEEE
15 years 4 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
77
Voted
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
HPCA
2003
IEEE
15 years 10 months ago
2003
IEEE
This paper identifies node affinity as an important property for scalable general-purpose locks. Nonuniform communication architectures (NUCAs), for example CCNUMAs built from a f...