284 search results - page 49 / 57 » Parallel buffers for chip multiprocessors |
ASAP
2008
IEEE
15 years 4 months ago
2008
IEEE
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
ISCA
2008
IEEE
15 years 4 months ago
2008
IEEE
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
ARCS
2006
Springer
15 years 1 months ago
2006
Springer
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
ICPP
2005
IEEE
15 years 3 months ago
2005
IEEE
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
ICPP
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...