284 search results - page 55 / 57 » Parallel buffers for chip multiprocessors |
85
Voted
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
In this Paper, we describe the various low power techniques for mobile application SoCs based on the integrated platform "UniPhier". To minimize SoC power dissipation, h...
84
Voted
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...