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SPAA
2010
ACM
15 years 3 months ago
A universal construction for wait-free transaction friendly data structures
Given the sequential implementation of any data structure, we show how to obtain an efficient, wait-free implementation of that data structure shared by any fixed number of proces...
Phong Chuong, Faith Ellen, Vijaya Ramachandran
ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
15 years 8 months ago
A low-power VLSI architecture for turbo decoding
Presented in this paper is a low-power architecture for turbo decodings of parallel concatenated convolutional codes. The proposed architecture is derived via the concept of block...
Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer
124
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PDCAT
2007
Springer
15 years 9 months ago
Realistic Evaluation of Interconnection Network Performance at High Loads
Any simulation-based evaluation of an interconnection network proposal requires a good characterization of the workload. Synthetic traffic patterns based on independent traffic so...
Francisco Javier Ridruejo Perez, Javier Navaridas,...
SC
2003
ACM
15 years 8 months ago
A Million-Fold Speed Improvement in Genomic Repeats Detection
This paper presents a novel, parallel algorithm for generating top alignments. Top alignments are used for finding internal repeats in biological sequences like proteins and gene...
John W. Romein, Jaap Heringa, Henri E. Bal
NPC
2010
Springer
15 years 1 months ago
Distributed Stream Processing with DUP
This paper introduces the DUP System, a simple framework for parallel stream processing. The DUP System enables developers to compose applications from stages written in almost any...
Kai Christian Bader, Tilo Eißler, Nathan S. ...