16159 search results - page 2976 / 3232 » Parallel computing with CUDA |
117
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IEEEPACT
2007
IEEE
15 years 8 months ago
2007
IEEE
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
104
Voted
IEEEPACT
2007
IEEE
15 years 8 months ago
2007
IEEE
Under current worst-case design practices, manufacturers specify conservative values for processor frequencies in order to guarantee correctness. To recover some of the lost perfo...
134
Voted
IEEEPACT
2007
IEEE
15 years 8 months ago
2007
IEEE
In this paper we propose a unified architectural support that can be used flexibly for either soft-error protection or software bug detection. Our approach is based on dynamically...
135
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IEEEPACT
2007
IEEE
15 years 8 months ago
2007
IEEE
Nowadays, multithreaded architectures are becoming more and more popular. In order to evaluate their behavior, several methodologies and metrics have been proposed. A methodology ...
104
Voted
IEEEPACT
2007
IEEE
15 years 8 months ago
2007
IEEE
We present a detailed characterization of instruction cache performance for IBM’s J2EE-enabled web server, WebSphere Application Server (WAS). When running two J2EE benchmarks o...