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113
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TCAD
2002
98views more  TCAD 2002»
15 years 3 months ago
An Esterel compiler for large control-dominated systems
Embedded hard real-time software systems often need fine-grained parallelism and precise control of timing, things typical real-time operating systems do not provide. The Esterel l...
Stephen A. Edwards
162
Voted
IPPS
2010
IEEE
15 years 1 months ago
A GPU-inspired soft processor for high-throughput acceleration
There is building interest in using FPGAs as accelerators for high-performance computing, but existing systems for programming them are so far inadequate. In this paper we propose...
Jeffrey Kingyens, J. Gregory Steffan
112
Voted
IPPS
2010
IEEE
15 years 1 months ago
Analyzing the trade-off between multiple memory controllers and memory channels on multi-core processor performance
Increasing the core-count on current and future processors is posing critical challenges to the memory subsystem to efficiently handle concurrent memory requests. The current tren...
José Carlos Sancho, Michael Lang 0003, Darr...
129
Voted
IPPS
2010
IEEE
15 years 1 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
165
Voted
HPCA
2011
IEEE
14 years 7 months ago
Bloom Filter Guided Transaction Scheduling
Contention management is an important design component to a transactional memory system. Without effective contention management to ensure forward progress, a transactional memory...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...