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IPPS
2010
IEEE
15 years 2 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
159
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MEMICS
2010
14 years 11 months ago
GPU-Based Sample-Parallel Context Modeling for EBCOT in JPEG2000
Embedded Block Coding with Optimal Truncation (EBCOT) is the fundamental and computationally very demanding part of the compression process of JPEG2000 image compression standard. ...
Jiri Matela, Vit Rusnak, Petr Holub
ICASSP
2011
IEEE
14 years 8 months ago
A methodology based on Transportation problem modeling for designing parallel interleaver architectures
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
Awais Sani, Philippe Coussy, Cyrille Chavet, Eric ...
POPL
2012
ACM
13 years 11 months ago
Analysis of recursively parallel programs
We propose a general formal model of isolated hierarchical parallel computations, and identify several fragments to match the concurrency constructs present in real-world programm...
Ahmed Bouajjani, Michael Emmi
ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
15 years 10 months ago
Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)
— The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to ...
Umair F. Siddiqi, Sadiq M. Sait