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» Parallel error correcting codes
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VLSID
2005
IEEE
124views VLSI» more  VLSID 2005»
15 years 6 months ago
Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury
92
Voted
TIT
2010
103views Education» more  TIT 2010»
14 years 7 months ago
Codes in permutations and error correction for rank modulation
Codes for rank modulation have been recently proposed as a means of protecting flash memory devices from errors. We study basic coding theoretic problems for such codes, representi...
Alexander Barg, Arya Mazumdar
CORR
2010
Springer
65views Education» more  CORR 2010»
15 years 1 days ago
Iterative method for improvement of coding and decryption
Cryptographic check values (digital signatures, MACs and H-MACs) are useful only if they are free of errors. For that reason all of errors in cryptographic check values should be ...
Natasa Zivic
107
Voted
ISCAS
2006
IEEE
140views Hardware» more  ISCAS 2006»
15 years 6 months ago
Multilevel flash memory on-chip error correction based on trellis coded modulation
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Z...
ICC
2008
IEEE
161views Communications» more  ICC 2008»
15 years 7 months ago
Multidimensional Layered Forward Error Correction Using Rateless Codes
Abstract— Modern layered or scalable video coding technologies generate a video bit stream with various inter layer dependencies due to references between the layers. This work p...
Cornelius Hellge, Thomas Schierl, Thomas Wiegand