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» Parallel error correcting codes
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SAC
2006
ACM
15 years 4 months ago
Assisted verification of elementary functions using Gappa
The implementation of a correctly rounded or interval elementary function needs to be proven carefully in the very last details. The proof requires a tight bound on the overall er...
Florent de Dinechin, Christoph Quirin Lauter, Guil...
ICPPW
2009
IEEE
15 years 11 months ago
CkDirect: Unsynchronized One-Sided Communication in a Message-Driven Paradigm
A significant fraction of parallel scientific codes are iterative with barriers between iterations or even between phases of the same iteration. The sender of a message is assur...
Eric J. Bohm, Sayantan Chakravorty, Pritish Jetley...
133
Voted
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 8 months ago
Use ECP, not ECC, for hard failures in resistive memories
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
Stuart E. Schechter, Gabriel H. Loh, Karin Straus,...
ASPLOS
2004
ACM
15 years 10 months ago
Programming with transactional coherence and consistency (TCC)
Transactional Coherence and Consistency (TCC) offers a way to simplify parallel programming by executing all code within transactions. In TCC systems, transactions serve as the fu...
Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben...
MICRO
1992
IEEE
133views Hardware» more  MICRO 1992»
15 years 8 months ago
Code generation schema for modulo scheduled loops
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...