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78
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FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
15 years 4 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
15 years 1 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
ICRA
2010
IEEE
185views Robotics» more  ICRA 2010»
14 years 8 months ago
MOPED: A scalable and low latency object recognition and pose estimation system
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
Manuel Martinez, Alvaro Collet, Siddhartha S. Srin...
IEEEPACT
2006
IEEE
15 years 3 months ago
A two-phase escape analysis for parallel java programs
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
Kyungwoo Lee, Samuel P. Midkiff
81
Voted
SPAA
2006
ACM
15 years 3 months ago
Playing push vs pull: models and algorithms for disseminating dynamic data in networks
Consider a network in which a collection of source nodes maintain and periodically update data objects for a collection of sink nodes, each of which periodically accesses the data...
R. C. Chakinala, Abishek Kumarasubramanian, Kofi A...